1. Field of the Invention
The present invention relates to a new electronic part mounting board and electronic part mounting method.
2. Description of the Related Art
Along with the tendency toward the miniaturization and enhanced performance of electronic devices, the high density mounting of electronic parts such as positive/passive devices have been required. To meet the requirements of the high density mounting, the miniaturization of the electronic parts and the narrowed pitch of a terminal portion have been advanced. Additionally surface mounting technique has been developed. A conventional lead insertion system includes the steps of providing lead holes on a printed wiring board; passing lead wires of an electronic part through the lead holes; and soldering connection portions of a circuit provided on the printed wiring board on the side opposed to the electronic part with the lead wires of the electronic part. On the other hand, surface mounting technique is generally known as methods of directly electrically connecting/joining each connection portion formed on a printed wiring board with each terminal portion provided on an electronic part, without any lead hole for passing each lead wire of the electronic part to the printed wiring board therethrough.
Examples of the electronic parts used in the surface mounting technique include an angular chip part of leadless type or mini-mold type, a cylindrical chip part of leadless type, a part with a two-way lead such as SOP or SOJ, a part with a four-way lead such as QFP or PLCC, or a land grid array (LGA) package.
One of the electronic part mounting methods in the surface mounting technique is a solder reflow method. In this method, solder layers are provided on each terminal portion of the electronic part and on each connection portion of a circuit provided on a printed wiring board. In such a state that the solder layer formed on the terminal portion is contacted with the solder layer formed on the connection portion, the solder layers are heated into reflow, to be fused to each other, thus electrically connecting the terminal portion of the electronic part to the connection portion of the board.
In the conventional solder reflow method, the solder formed on the terminal portion of the electronic part and the solder layer formed on the connection portion of the circuit are both melted (reflow). For example, in an electronic part such as an LGA package, a lot of terminal portions are formed on the surface of the package. Accordingly, in the case of using the above solder reflow method, as is typically shown in FIG. 1, depending on the degree of the contact between a solder layer 30 formed on a terminal portion 12 of an electronic part 10 and a solder layer 32 formed on a connection portion 22 of a board 20, or depending on the degree of the smoothness of the board 20 such as a printed wiring board, the solder layer causes crushing upon the reflow of the solder layer, which brings about a problem in generating connection failure between the terminal potion and the connection portion after the reflow of the solder layer, or in making the interval between the electronic part and the printed wiring board unstable. Moreover, upon the reflow of the solder layer, a short-circuit may be generated between the adjacent terminal portions or the connection portions.
A flip-chip system has been known as a bear chip mounting technique of mounting a semiconductor bear chip on a board as it is (not packaged). The flip-chip system includes a CCB (Controlled Collapse Bonding), which is often called C4 process. In this CCB method, a spherical connection bump called a solder bump is formed on each terminal portion of a semiconductor bear chip, while a solder layer is formed on the surface of each connection portion of a circuit of the board. In general, the solder bump has a melting point higher than the solder layer formed on the surface of the connection portion of the circuit of the board.
In such a state that the solder bump is contacted with the solder layer formed on the connection portion of the circuit, the reflow treatment is made such that the solder bump is not melted and only the solder layer formed on the surface of the connection portion is melted, thus electrically connecting the terminal portion to the connection portion.
The above CCB method is adopted at present as a mounting method for a semiconductor bear chip on a board; however, there has been not known the case that the CCB method has been used for an electronic part such as the LGA package having a size being 100 times or more as much as that of the semiconductor chip.